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gaoqiong
MIGraphX
Commits
cf86db72
Commit
cf86db72
authored
Nov 07, 2018
by
Paul
Browse files
Merge branch 'master' into fp16
parents
af454aeb
414e2fac
Changes
167
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Showing
20 changed files
with
89 additions
and
10 deletions
+89
-10
src/targets/gpu/device/mul.cpp
src/targets/gpu/device/mul.cpp
+2
-0
src/targets/gpu/eliminate_workspace.cpp
src/targets/gpu/eliminate_workspace.cpp
+3
-0
src/targets/gpu/fuse_ops.cpp
src/targets/gpu/fuse_ops.cpp
+7
-2
src/targets/gpu/gemm.cpp
src/targets/gpu/gemm.cpp
+2
-1
src/targets/gpu/hip.cpp
src/targets/gpu/hip.cpp
+3
-0
src/targets/gpu/include/migraph/gpu/add.hpp
src/targets/gpu/include/migraph/gpu/add.hpp
+5
-1
src/targets/gpu/include/migraph/gpu/batchnorm.hpp
src/targets/gpu/include/migraph/gpu/batchnorm.hpp
+4
-1
src/targets/gpu/include/migraph/gpu/concat.hpp
src/targets/gpu/include/migraph/gpu/concat.hpp
+4
-1
src/targets/gpu/include/migraph/gpu/concat_gpu_opt.hpp
src/targets/gpu/include/migraph/gpu/concat_gpu_opt.hpp
+23
-0
src/targets/gpu/include/migraph/gpu/context.hpp
src/targets/gpu/include/migraph/gpu/context.hpp
+3
-0
src/targets/gpu/include/migraph/gpu/contiguous.hpp
src/targets/gpu/include/migraph/gpu/contiguous.hpp
+4
-1
src/targets/gpu/include/migraph/gpu/convolution.hpp
src/targets/gpu/include/migraph/gpu/convolution.hpp
+4
-1
src/targets/gpu/include/migraph/gpu/device/add.hpp
src/targets/gpu/include/migraph/gpu/device/add.hpp
+3
-0
src/targets/gpu/include/migraph/gpu/device/add_relu.hpp
src/targets/gpu/include/migraph/gpu/device/add_relu.hpp
+3
-0
src/targets/gpu/include/migraph/gpu/device/concat.hpp
src/targets/gpu/include/migraph/gpu/device/concat.hpp
+3
-0
src/targets/gpu/include/migraph/gpu/device/contiguous.hpp
src/targets/gpu/include/migraph/gpu/device/contiguous.hpp
+3
-0
src/targets/gpu/include/migraph/gpu/device/mul.hpp
src/targets/gpu/include/migraph/gpu/device/mul.hpp
+3
-0
src/targets/gpu/include/migraph/gpu/eliminate_workspace.hpp
src/targets/gpu/include/migraph/gpu/eliminate_workspace.hpp
+3
-0
src/targets/gpu/include/migraph/gpu/fuse_ops.hpp
src/targets/gpu/include/migraph/gpu/fuse_ops.hpp
+3
-1
src/targets/gpu/include/migraph/gpu/gemm.hpp
src/targets/gpu/include/migraph/gpu/gemm.hpp
+4
-1
No files found.
src/targets/gpu/device/mul.cpp
View file @
cf86db72
...
...
@@ -2,6 +2,7 @@
#include <migraph/gpu/device/nary.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -21,4 +22,5 @@ void mul(hipStream_t stream,
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/eliminate_workspace.cpp
View file @
cf86db72
...
...
@@ -9,6 +9,7 @@
#include <migraph/pass_config.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
void
eliminate_workspace
::
apply
(
program
&
p
)
const
...
...
@@ -38,5 +39,7 @@ void eliminate_workspace::apply(program& p) const
p
.
remove_instruction
(
a
);
}
}
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/fuse_ops.cpp
View file @
cf86db72
...
...
@@ -6,7 +6,7 @@
#include <migraph/instruction.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
struct
fusion
...
...
@@ -157,6 +157,7 @@ struct hip_triadd
device
::
add
(
ctx
.
get_stream
().
get
(),
args
.
at
(
3
),
args
.
at
(
0
),
args
.
at
(
1
),
args
.
at
(
2
));
return
args
.
at
(
3
);
}
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
struct
hip_triadd_relu
...
...
@@ -172,6 +173,7 @@ struct hip_triadd_relu
device
::
add_relu
(
ctx
.
get_stream
().
get
(),
args
.
at
(
3
),
args
.
at
(
0
),
args
.
at
(
1
),
args
.
at
(
2
));
return
args
.
at
(
3
);
}
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
struct
hip_add_relu
...
...
@@ -187,6 +189,7 @@ struct hip_add_relu
device
::
add_relu
(
ctx
.
get_stream
().
get
(),
args
.
at
(
2
),
args
.
at
(
0
),
args
.
at
(
1
));
return
args
.
at
(
2
);
}
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
struct
find_add_relu
...
...
@@ -273,6 +276,7 @@ struct miopen_conv_bias
f
.
compile
(
ctx
);
return
f
.
get_workspace
(
ctx
);
}
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
struct
miopen_conv_bias_relu
...
...
@@ -316,6 +320,7 @@ struct miopen_conv_bias_relu
f
.
compile
(
ctx
);
return
f
.
get_workspace
(
ctx
);
}
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
template
<
class
...
Ms
>
...
...
@@ -384,5 +389,5 @@ void fuse_ops::apply(program& p) const
}
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/gemm.cpp
View file @
cf86db72
...
...
@@ -5,6 +5,7 @@
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
template
<
class
...
Ts
>
...
...
@@ -82,5 +83,5 @@ argument miopen_gemm::compute(context& ctx,
}
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/hip.cpp
View file @
cf86db72
...
...
@@ -7,6 +7,7 @@
#include <vector>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
using
hip_ptr
=
MIGRAPH_MANAGE_PTR
(
void
,
hipFree
);
...
...
@@ -107,5 +108,7 @@ void copy_to_gpu(argument src, argument dst)
if
(
status
!=
hipSuccess
)
MIGRAPH_THROW
(
"Copy to gpu failed: "
+
hip_error
(
status
));
}
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
src/targets/gpu/include/migraph/gpu/add.hpp
View file @
cf86db72
...
...
@@ -15,9 +15,11 @@
#include <migraph/iterator_for.hpp>
#include <migraph/gpu/rocblas.hpp>
#include <migraph/gpu/context.hpp>
#include <migraph/config.hpp>
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
struct
hip_add
...
...
@@ -25,6 +27,7 @@ struct hip_add
std
::
string
name
()
const
{
return
"gpu::add"
;
}
shape
compute_shape
(
const
std
::
vector
<
shape
>&
inputs
)
const
;
argument
compute
(
context
&
,
const
shape
&
,
const
std
::
vector
<
argument
>&
args
)
const
;
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
struct
miopen_add
...
...
@@ -33,10 +36,11 @@ struct miopen_add
shape
compute_shape
(
const
std
::
vector
<
shape
>&
inputs
)
const
;
argument
compute
(
context
&
ctx
,
const
shape
&
output_shape
,
const
std
::
vector
<
argument
>&
args
)
const
;
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/batchnorm.hpp
View file @
cf86db72
...
...
@@ -15,9 +15,11 @@
#include <migraph/iterator_for.hpp>
#include <migraph/gpu/rocblas.hpp>
#include <migraph/gpu/context.hpp>
#include <migraph/config.hpp>
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
struct
miopen_batch_norm_inference
...
...
@@ -27,10 +29,11 @@ struct miopen_batch_norm_inference
shape
compute_shape
(
const
std
::
vector
<
shape
>&
inputs
)
const
;
argument
compute
(
context
&
ctx
,
const
shape
&
output_shape
,
const
std
::
vector
<
argument
>&
args
)
const
;
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/concat.hpp
View file @
cf86db72
...
...
@@ -7,6 +7,7 @@
#include <migraph/operators.hpp>
#include <migraph/generate.hpp>
#include <migraph/shape_for_each.hpp>
#include <migraph/config.hpp>
#include <migraph/gpu/miopen.hpp>
#include <migraph/gpu/hip.hpp>
#include <migraph/dfor.hpp>
...
...
@@ -18,6 +19,7 @@
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
struct
hip_concat
...
...
@@ -28,10 +30,11 @@ struct hip_concat
shape
compute_shape
(
std
::
vector
<
shape
>
inputs
)
const
;
argument
compute
(
context
&
ctx
,
const
shape
&
output_shape
,
const
std
::
vector
<
argument
>&
args
)
const
;
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/concat_gpu_opt.hpp
0 → 100644
View file @
cf86db72
#ifndef MIGRAPH_GUARD_RTGLIB_CONCAT_GPU_OPT_HPP
#define MIGRAPH_GUARD_RTGLIB_CONCAT_GPU_OPT_HPP
#include <migraph/gpu/concat.hpp>
namespace
migraph
{
namespace
gpu
{
struct
concat_gpu_optimization
{
std
::
string
name
()
const
{
return
"gpu::concat"
;
}
std
::
string
allocate
()
const
{
return
"hip::allocate"
;
}
migraph
::
op
::
concat
get_concat
(
const
migraph
::
operation
&
op
)
const
{
return
migraph
::
any_cast
<
migraph
::
gpu
::
hip_concat
>
(
op
).
op
;
}
};
}
// namespace gpu
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/context.hpp
View file @
cf86db72
...
...
@@ -5,8 +5,10 @@
#include <migraph/gpu/rocblas.hpp>
#include <migraph/gpu/hip.hpp>
#include <migraph/env.hpp>
#include <migraph/config.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
MIGRAPH_DECLARE_ENV_VAR
(
MIGRAPH_DISABLE_NULL_STREAM
)
...
...
@@ -114,6 +116,7 @@ struct context
std
::
shared_ptr
<
hip_device
>
current_device
;
};
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/contiguous.hpp
View file @
cf86db72
...
...
@@ -7,6 +7,7 @@
#include <migraph/operators.hpp>
#include <migraph/generate.hpp>
#include <migraph/shape_for_each.hpp>
#include <migraph/config.hpp>
#include <migraph/gpu/miopen.hpp>
#include <migraph/gpu/hip.hpp>
#include <migraph/dfor.hpp>
...
...
@@ -18,6 +19,7 @@
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
struct
miopen_contiguous
...
...
@@ -26,10 +28,11 @@ struct miopen_contiguous
std
::
string
name
()
const
{
return
"gpu::contiguous"
;
}
shape
compute_shape
(
const
std
::
vector
<
shape
>&
inputs
)
const
;
argument
compute
(
context
&
,
shape
output_shape
,
const
std
::
vector
<
argument
>&
args
)
const
;
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/convolution.hpp
View file @
cf86db72
...
...
@@ -7,6 +7,7 @@
#include <migraph/operators.hpp>
#include <migraph/generate.hpp>
#include <migraph/shape_for_each.hpp>
#include <migraph/config.hpp>
#include <migraph/gpu/miopen.hpp>
#include <migraph/gpu/hip.hpp>
#include <migraph/dfor.hpp>
...
...
@@ -18,6 +19,7 @@
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
struct
miopen_convolution
...
...
@@ -38,10 +40,11 @@ struct miopen_convolution
argument
compute
(
context
&
ctx
,
const
shape
&
output_shape
,
const
std
::
vector
<
argument
>&
args
)
const
;
shape
compile
(
context
&
ctx
,
const
shape
&
output_shape
,
std
::
vector
<
instruction_ref
>
inputs
);
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/device/add.hpp
View file @
cf86db72
...
...
@@ -3,9 +3,11 @@
#define MIGRAPH_GUARD_RTGLIB_DEVICE_ADD_HPP
#include <migraph/argument.hpp>
#include <migraph/config.hpp>
#include <hip/hip_runtime_api.h>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -19,6 +21,7 @@ void add(hipStream_t stream,
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/device/add_relu.hpp
View file @
cf86db72
...
...
@@ -3,9 +3,11 @@
#define MIGRAPH_GUARD_RTGLIB_DEVICE_ADD_RELU_HPP
#include <migraph/argument.hpp>
#include <migraph/config.hpp>
#include <hip/hip_runtime_api.h>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -22,6 +24,7 @@ void add_relu(hipStream_t stream,
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/device/concat.hpp
View file @
cf86db72
...
...
@@ -2,9 +2,11 @@
#define MIGRAPH_GUARD_RTGLIB_DEVICE_CONCAT_HPP
#include <migraph/argument.hpp>
#include <migraph/config.hpp>
#include <hip/hip_runtime_api.h>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -15,6 +17,7 @@ argument concat(hipStream_t stream,
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/device/contiguous.hpp
View file @
cf86db72
...
...
@@ -2,9 +2,11 @@
#define MIGRAPH_GUARD_MIGRAPHLIB_KERNELS_HPP
#include <migraph/argument.hpp>
#include <migraph/config.hpp>
#include <hip/hip_runtime_api.h>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -12,6 +14,7 @@ void contiguous(hipStream_t stream, argument result, argument arg);
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/device/mul.hpp
View file @
cf86db72
...
...
@@ -3,9 +3,11 @@
#define MIGRAPH_GUARD_RTGLIB_DEVICE_MUL_HPP
#include <migraph/argument.hpp>
#include <migraph/config.hpp>
#include <hip/hip_runtime_api.h>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
namespace
device
{
...
...
@@ -19,6 +21,7 @@ void mul(hipStream_t stream,
}
// namespace device
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/eliminate_workspace.hpp
View file @
cf86db72
...
...
@@ -3,8 +3,10 @@
#include <string>
#include <migraph/instruction_ref.hpp>
#include <migraph/config.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
struct
program
;
namespace
gpu
{
...
...
@@ -15,6 +17,7 @@ struct eliminate_workspace
void
apply
(
program
&
p
)
const
;
};
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/fuse_ops.hpp
View file @
cf86db72
...
...
@@ -2,9 +2,11 @@
#define MIGRAPH_GUARD_RTGLIB_FUSE_OPS_HPP
#include <migraph/program.hpp>
#include <migraph/config.hpp>
#include <migraph/gpu/context.hpp>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
...
...
@@ -16,7 +18,7 @@ struct fuse_ops
};
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
src/targets/gpu/include/migraph/gpu/gemm.hpp
View file @
cf86db72
...
...
@@ -10,6 +10,7 @@
#include <migraph/gpu/miopen.hpp>
#include <migraph/gpu/hip.hpp>
#include <migraph/dfor.hpp>
#include <migraph/config.hpp>
#include <migraph/gpu/device/contiguous.hpp>
#include <migraph/gpu/device/add.hpp>
#include <migraph/iterator_for.hpp>
...
...
@@ -18,6 +19,7 @@
#include <utility>
namespace
migraph
{
inline
namespace
MIGRAPH_INLINE_NS
{
namespace
gpu
{
struct
miopen_gemm
...
...
@@ -27,10 +29,11 @@ struct miopen_gemm
shape
compute_shape
(
const
std
::
vector
<
shape
>&
inputs
)
const
;
argument
compute
(
context
&
ctx
,
const
shape
&
output_shape
,
const
std
::
vector
<
argument
>&
args
)
const
;
int
output_alias
(
const
std
::
vector
<
shape
>&
shapes
)
const
{
return
shapes
.
size
()
-
1
;
}
};
}
// namespace gpu
}
// namespace MIGRAPH_INLINE_NS
}
// namespace migraph
#endif
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