Format

src/targets/gpu/kernels/include/migraphx/kernels/reduce.hpp

@@ -95,7 +95,6 @@ MIGRAPHX_DPP_REDUCE(op::product, v_mul, _u)
 MIGRAPHX_DPP_REDUCE(op::max, v_max, _i)
 MIGRAPHX_DPP_REDUCE(op::min, v_min, _i)
 
-
 template <class Op, class T, class Index, class F>
 __device__ auto wave_reduce(index idx, Op op, T init, Index n, F f)
 {
@@ -111,7 +110,7 @@ template <class Op, class T, class Index, class F>
 __device__ auto block_reduce(index idx, Op op, T init, Index n, F f)
 {
     MIGRAPHX_ASSERT(idx.max_nlocal() == idx.nlocal());
-    if (idx.max_nlocal() == idx.nlocal_wave())
+    if(idx.max_nlocal() == idx.nlocal_wave())
         return wave_reduce(idx, op, init, n, f);
 #if __AMDGCN_WAVEFRONT_SIZE == 32
     constexpr index_int lanes_per_thread = 16;