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gaoqiong
composable_kernel_ROCM
Commits
4e92d44c
Commit
4e92d44c
authored
Feb 14, 2025
by
aska-0096
Browse files
tempsave
parent
ccd2fb13
Changes
1
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1 changed file
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15 additions
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13 deletions
+15
-13
include/ck_tile/ops/fmha/pipeline/block_fmha_bwd_pipeline_default_policy.hpp
.../fmha/pipeline/block_fmha_bwd_pipeline_default_policy.hpp
+15
-13
No files found.
include/ck_tile/ops/fmha/pipeline/block_fmha_bwd_pipeline_default_policy.hpp
View file @
4e92d44c
...
...
@@ -1749,27 +1749,29 @@ struct BlockFmhaBwdPipelineDefaultPolicy
constexpr
index_t
MFMA_INST
=
Gemm3MFMA
;
// To hide instruction issue latency
constexpr
index_t
LDS_WRITE_PER_MFMA
=
LDS_WRITE_INST
/
MFMA_INST
>=
1
?
LDS_WRITE_INST
/
MFMA_INST
:
1
;
constexpr
index_t
LDS_WRITE_PER_MFMA
=
ck_tile
::
integer_divide_ceil
(
LDS_WRITE_INST
,
MFMA_INST
);
constexpr
index_t
MFMA_INST_LDS_WRITE
=
LDS_WRITE_INST
/
LDS_WRITE_PER_MFMA
;
constexpr
index_t
LDS_READ_PER_MFMA
=
(
MFMA_INST
-
MFMA_INST_LDS_WRITE
)
>
0
?
LDS_READ_INST
/
(
MFMA_INST
-
MFMA_INST_LDS_WRITE
)
>
0
?
LDS_READ_INST
/
(
MFMA_INST
-
MFMA_INST_LDS_WRITE
)
:
1
:
0
;
constexpr
index_t
LDS_READ_PER_MFMA
=
ck_tile
::
integer_divide_ceil
(
LDS_READ_INST
,
(
MFMA_INST
-
MFMA_INST_LDS_WRITE
));
static_for
<
0
,
MFMA_INST_LDS_WRITE
,
1
>
{}([
&
](
auto
i
)
{
ignore
=
i
;
__builtin_amdgcn_sched_group_barrier
(
0x008
,
1
,
0
);
// MFMA
if
constexpr
(
i
*
LDS_WRITE_PER_MFMA
<
LDS_WRITE_INST
){
__builtin_amdgcn_sched_group_barrier
(
0x200
,
LDS_WRITE_PER_MFMA
,
0
);
// DS Write
}
else
if
constexpr
(
(
i
+
1
)
*
LDS_WRITE_PER_MFMA
>
LDS_WRITE_INST
){
__builtin_amdgcn_sched_group_barrier
(
0x200
,
LDS_WRITE_INST
-
i
*
LDS_WRITE_PER_MFMA
,
0
);
// DS Write
}
});
static_for
<
0
,
MFMA_INST
-
MFMA_INST_LDS_WRITE
,
1
>
{}([
&
](
auto
i
)
{
ignore
=
i
;
__builtin_amdgcn_sched_group_barrier
(
0x008
,
1
,
0
);
// MFMA
if
constexpr
(
i
*
LDS_READ_PER_MFMA
<
LDS_READ_INST
){
__builtin_amdgcn_sched_group_barrier
(
0x100
,
LDS_READ_PER_MFMA
,
0
);
// DS Read
}
else
if
constexpr
(
(
i
+
1
)
*
LDS_READ_PER_MFMA
>
LDS_READ_INST
){
__builtin_amdgcn_sched_group_barrier
(
0x100
,
LDS_READ_INST
-
i
*
LDS_READ_PER_MFMA
,
0
);
// DS Read
}
});
}
...
...
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