format

include/ck/tensor_operation/gpu/device/device_gemm_reduce_xdl_cshuffle.hpp

@@ -15,7 +15,8 @@ namespace tensor_operation {
 namespace device {
 
 // Note: inter-wave loop scheduler is rolled out to c-shuffle version first. Becuase non c-shuffle
-// version currently has compiler issues with register spill which further causes validation failures.
+// version currently has compiler issues with register spill which further causes validation
+// failures.
 template <typename ALayout,
           typename BLayout,
           typename CLayout,

include/ck/tensor_operation/gpu/device/device_gemm_xdl_cshuffle.hpp

@@ -15,7 +15,8 @@ namespace tensor_operation {
 namespace device {
 
 // Note: inter-wave loop scheduler is rolled out to c-shuffle version first. Becuase non c-shuffle
-// version currently has compiler issues with register spill which further causes validation failures.
+// version currently has compiler issues with register spill which further causes validation
+// failures.
 template <typename ALayout,
           typename BLayout,
           typename CLayout,

include/ck/tensor_operation/gpu/grid/gridwise_gemm_pipeline_v1.hpp

@@ -276,8 +276,7 @@ struct GridwiseGemmPipelineInterwave_v1<1>
               typename BBlockTransferStep,
               typename BlockwiseGemm,
               typename CThreadBuffer>
-    static __device__ void
-    Run(const AGridDesc& a_grid_desc,
+    static __device__ void Run(const AGridDesc& a_grid_desc,
                                const ABlockDesc& a_block_desc,
                                ABlockTransfer& a_blockwise_copy,
                                const AGridBuffer& a_grid_buf,