{"exp_name": "no_simb-gt-sleep", "metadata": {}, "start_time": 1620356029.1323333, "end_time": 1620356164.4128067, "sims": {"host.host.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/simbricks/sims/external/gem5/build/X86/gem5.fast", "--outdir=/home/hejingli/simbricks/experiments/out/no_simb-gt-sleep/1/gem5-out.host.0", "/home/hejingli/simbricks/sims/external/gem5/configs/simbricks/simbricks.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=3GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/simbricks/experiments/out/no_simb-gt-sleep/0/gem5-cp.host.0", "--kernel=/home/hejingli/simbricks/images/vmlinux", "--disk-image=/home/hejingli/simbricks/images/output-base/base.raw", "--disk-image=/home/hejingli/simbricks/experiments/out/no_simb-gt-sleep/1/cfg.host.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "--no-simbricks", "-r", "0"], "stdout": ["gem5 Simulator System.  http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled May  7 2021 04:15:50", "gem5 started May  7 2021 04:53:49", "gem5 executing on swsnetlab05, pid 58454", "command line: /home/hejingli/simbricks/sims/external/gem5/build/X86/gem5.fast --outdir=/home/hejingli/simbricks/experiments/out/no_simb-gt-sleep/1/gem5-out.host.0 /home/hejingli/simbricks/sims/external/gem5/configs/simbricks/simbricks.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=3GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/simbricks/experiments/out/no_simb-gt-sleep/0/gem5-cp.host.0 --kernel=/home/hejingli/simbricks/images/vmlinux --disk-image=/home/hejingli/simbricks/images/output-base/base.raw --disk-image=/home/hejingli/simbricks/experiments/out/no_simb-gt-sleep/1/cfg.host.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 --no-simbricks -r 0", "", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", "Switch at curTick count:10000", "Switched CPUS @ tick 1098201875167", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[    0.734934] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[    0.734934] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "+ ip link set dev eth0 up\r", "Cannot find device \"eth0\"\r", "+ ip addr add 10.0.0.1/24 dev eth0\r", "Cannot find device \"eth0\"\r", "+ sleep 10\r", "+ m5 exit\r", "Exiting @ tick 11152755164583 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB.  Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/simbricks/images/vmlinux", "system.pc.com_1.device: Listening for connections on port 3456", "0: system.remote_gdb: listening for remote gdb on port 7000", "warn: Reading current count from inactive timer.", "info: Entering event queue @ 1098201865167.  Starting simulation...", "info: Entering event queue @ 1098201875167.  Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 1098201875490.  Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: Tried to clear PCI interrupt 14", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!"]}}, "success": true}