{"exp_name": "gt-ib-dumbbell-DCTCPm83200-1500", "start_time": 1607019296.1678925, "end_time": 1607058641.8253317, "sims": {"nic.server.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.server.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["70d45318ac50", "sync_pci=1 sync_eth=1", "exit main_time: 15588657379000"]}, "nic.server.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.server.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["2eae1d62c120", "sync_pci=1 sync_eth=1", "exit main_time: 15588657412000"]}, "nic.client.0.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.client.0.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.0.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["d9b3d3fcb8c", "sync_pci=1 sync_eth=1", "exit main_time: 15588657454000"]}, "nic.client.1.": {"class": "I40eNIC", "cmd": ["/home/hejingli/endhostsim-code/i40e_bm/i40e_bm", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.client.1.", "/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.1.", "0", "0", "500", "500", "500"], "stdout": ["eth connection accepted", "eth intro sent", "pci connection accepted", "pci intro sent", "pci host info received", "eth net info received"], "stderr": ["7e61b3ac8e08", "sync_pci=1 sync_eth=1", "exit main_time: 15588656954400"]}, "net.": {"class": "NS3DumbbellNet", "cmd": ["/home/hejingli/endhostsim-code/ns-3/cosim-run.sh", "cosim", "cosim-dumbbell-example", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.server.0.", "--CosimPortLeft=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.server.1.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.client.0.", "--CosimPortRight=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.eth.client.1.", "--LinkRate=10Gb/s", "--LinkLatency=500ns", "--EcnTh=83200"], "stdout": [], "stderr": []}, "host.server.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.server.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.server.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.server.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System.  http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec  3 2020 17:56:02", "gem5 started Dec  3 2020 19:14:57", "gem5 executing on spyder08, pid 63221", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.server.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.server.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.server.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", "      0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan  1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2316847331800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[    1.077888] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[    1.077888] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[    1.077888] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[    1.077888] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[    1.084887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[    1.084887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[    1.203868] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[    1.204868] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[    1.204868] i40e 0000:00:02.0: MAC address: 50:ac:18:53:d4:70\r", "[    1.204868] i40e 0000:00:02.0: FW LLDP is enabled\r", "[    1.206868] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[    1.287856] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[    1.287856] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[    1.287856] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[    1.287856] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[    1.383841] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[    1.397839] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.1/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[  5] local 192.168.64.1 port 5001 connected with 192.168.64.3 port 38594\r", "[    2.439681] random: crng init done\r", "[ ID] Interval       Transfer     Bandwidth\r", "[  5]  0.0-10.0 sec  3.78 GBytes  3.24 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB.  Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000  pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2316847321800.  Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2316847331800.  Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.server.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.server.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.server.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.server.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System.  http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec  3 2020 17:56:02", "gem5 started Dec  3 2020 19:14:57", "gem5 executing on spyder08, pid 63225", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.server.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.server.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.server.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.server.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.server.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", "      0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan  1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2274002321400", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[    1.070889] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[    1.070889] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[    1.071889] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[    1.071889] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[    1.078887] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[    1.078887] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[    1.196870] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[    1.197869] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[    1.197869] i40e 0000:00:02.0: MAC address: 20:c1:62:1d:ae:2e\r", "[    1.197869] i40e 0000:00:02.0: FW LLDP is enabled\r", "[    1.200869] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[    1.279857] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[    1.279857] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[    1.279857] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[    1.279857] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[    1.375842] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[    1.389840] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.2/24 dev eth0\r", "+ iperf -s -w 1M -Z dctcp\r", "------------------------------------------------------------\r", "Server listening on TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[  5] local 192.168.64.2 port 5001 connected with 192.168.64.4 port 50814\r", "[    2.383689] random: crng init done\r", "[ ID] Interval       Transfer     Bandwidth\r", "[  5]  0.0-10.0 sec  3.78 GBytes  3.25 Gbits/sec\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB.  Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000  pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2274002311400.  Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2274002321400.  Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.0": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.client.0", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.client.0", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.client.0.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.0.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.0.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System.  http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec  3 2020 17:56:02", "gem5 started Dec  3 2020 19:14:57", "gem5 executing on spyder08, pid 63227", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.client.0 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.client.0 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.client.0.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.0. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.0. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", "      0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan  1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2314875190600", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[    1.061890] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[    1.061890] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[    1.061890] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[    1.061890] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[    1.068889] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[    1.068889] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[    1.187871] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[    1.188871] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[    1.188871] i40e 0000:00:02.0: MAC address: 8c:cb:3f:3d:9b:0d\r", "[    1.188871] i40e 0000:00:02.0: FW LLDP is enabled\r", "[    1.190870] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[    1.271858] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[    1.271858] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[    1.271858] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[    1.271858] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[    1.367843] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[    1.381841] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.3/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.1 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.1, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[  4] local 192.168.64.3 port 38594 connected with 192.168.64.1 port 5001\r", "[    2.556663] random: crng init done\r", "[ ID] Interval       Transfer     Bandwidth\r", "[  4]  0.0- 1.0 sec   383 MBytes  3.22 Gbits/sec\r", "[  4]  1.0- 2.0 sec   386 MBytes  3.23 Gbits/sec\r", "[  4]  2.0- 3.0 sec   384 MBytes  3.22 Gbits/sec\r", "[  4]  3.0- 4.0 sec   386 MBytes  3.24 Gbits/sec\r", "[  4]  4.0- 5.0 sec   384 MBytes  3.22 Gbits/sec\r", "[  4]  5.0- 6.0 sec   385 MBytes  3.23 Gbits/sec\r", "[  4]  6.0- 7.0 sec   386 MBytes  3.24 Gbits/sec\r", "[  4]  7.0- 8.0 sec   392 MBytes  3.29 Gbits/sec\r", "[  4]  8.0- 9.0 sec   388 MBytes  3.25 Gbits/sec\r", "[  4]  9.0-10.0 sec   392 MBytes  3.29 Gbits/sec\r", "[  4]  0.0-10.0 sec  3.78 GBytes  3.24 Gbits/sec\r", "+ sleep 20\r"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB.  Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000  pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2314875180600.  Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2314875190600.  Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}, "host.client.1": {"class": "Gem5Host", "cmd": ["/home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt", "--outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.client.1", "/home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py", "--caches", "--l2cache", "--l3cache", "--l1d_size=32kB", "--l1i_size=32kB", "--l2_size=2MB", "--l3_size=32MB", "--cacheline_size=64", "--cpu-clock=5GHz", "--sys-clock=1GHz", "--checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.client.1", "--kernel=/home/hejingli/endhostsim-code/images/vmlinux", "--disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw", "--disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.client.1.tar", "--cpu-type=TimingSimpleCPU", "--mem-size=8192MB", "--num-cpus=1", "--ddio-enabled", "--ddio-way-part=8", "--mem-type=DDR4_2400_16x4", "-r", "0", "--cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.1.", "--cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.1.", "--cosim-sync", "--cosim-sync_mode=0", "--cosim-pci-lat=500", "--cosim-sync-int=500", "--cosim-type=i40e"], "stdout": ["gem5 Simulator System.  http://gem5.org", "gem5 is copyrighted software; use the --copyright option for details.", "", "gem5 version 20.0.0.1", "gem5 compiled Dec  3 2020 17:56:02", "gem5 started Dec  3 2020 19:14:57", "gem5 executing on spyder08, pid 63230", "command line: /home/hejingli/endhostsim-code/gem5/build/X86/gem5.opt --outdir=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/gem5-out.client.1 /home/hejingli/endhostsim-code/gem5/configs/cosim/cosim.py --caches --l2cache --l3cache --l1d_size=32kB --l1i_size=32kB --l2_size=2MB --l3_size=32MB --cacheline_size=64 --cpu-clock=5GHz --sys-clock=1GHz --checkpoint-dir=/home/hejingli/endhostsim-code/experiments/out/gt-ib-dumbbell-DCTCPm83200-1500/0/gem5-cp.client.1 --kernel=/home/hejingli/endhostsim-code/images/vmlinux --disk-image=/home/hejingli/endhostsim-code/images/output-base/base.raw --disk-image=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/cfg.client.1.tar --cpu-type=TimingSimpleCPU --mem-size=8192MB --num-cpus=1 --ddio-enabled --ddio-way-part=8 --mem-type=DDR4_2400_16x4 -r 0 --cosim-pci=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.pci.client.1. --cosim-shm=/local/var/tmp/hejingli/gt-ib-dumbbell-DCTCPm83200-1500/1/nic.shm.client.1. --cosim-sync --cosim-sync_mode=0 --cosim-pci-lat=500 --cosim-sync-int=500 --cosim-type=i40e", "", "info: Standard input is not a terminal, disabling listeners.", "CEHCKPOINT RESTORE THINGIE", "Global frequency set at 1000000000000 ticks per second", "      0: system.pc.south_bridge.cmos.rtc: Real-time clock set to Sun Jan  1 00:00:00 2012", "Switch at curTick count:10000", "Switched CPUS @ tick 2219459675800", "switching cpus", "**** REAL SIMULATION ****", "+ modprobe i40e\r", "[    1.042893] i40e: Intel(R) Ethernet Connection XL710 Network Driver - version 2.8.20-k\r", "[    1.042893] i40e: Copyright (c) 2013 - 2019 Intel Corporation.\r", "[    1.042893] i40e 0000:00:02.0: enabling device (0000 -> 0002)\r", "[    1.042893] i40e 0000:00:02.0: PCI->APIC IRQ transform: INT A -> IRQ 17\r", "[    1.050892] i40e 0000:00:02.0: fw 0.0.00000 api 1.10 nvm 0.0.0 [8086:1572] [0000:0000]\r", "[    1.050892] i40e 0000:00:02.0: The driver for the device detected a newer version of the NVM image v1.10 than expected v1.9. Please install the most recent version of the network driver.\r", "[    1.168874] i40e 0000:00:02.0: This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\r", "[    1.169873] i40e 0000:00:02.0: Stopping firmware LLDP agent.\r", "[    1.169873] i40e 0000:00:02.0: MAC address: 08:8e:ac:b3:61:7e\r", "[    1.169873] i40e 0000:00:02.0: FW LLDP is enabled\r", "[    1.171873] i40e 0000:00:02.0 eth0: NIC Link is Up, 40 Gbps Full Duplex, Flow Control: None\r", "[    1.255860] i40e 0000:00:02.0: PCI-Express: Speed UnknownGT/s Width xUnknown\r", "[    1.255860] i40e 0000:00:02.0: PCI-Express bandwidth available for this device may be insufficient for optimal performance.\r", "[    1.255860] i40e 0000:00:02.0: Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\r", "[    1.255860] i40e 0000:00:02.0: Features: PF-id[0] VSIs: 384 QP: 1 RSS VxLAN Geneve PTP VEPA\r", "+ ethtool -G eth0 rx 4096 tx 4096\r", "+ ethtool -K eth0 tso off\r", "[    1.351846] i40e 0000:00:02.0: FW LLDP is enabled\r", "+ ip link set eth0 txqueuelen 13888\r", "+ ip link set dev eth0 mtu 1500 up\r", "[    1.365844] i40e 0000:00:02.0: Error OK adding RX filters on PF, promiscuous mode forced on\r", "+ ip addr add 192.168.64.4/24 dev eth0\r", "+ sleep 1\r", "+ iperf -w 1M -c 192.168.64.2 -Z dctcp -i 1\r", "------------------------------------------------------------\r", "Client connecting to 192.168.64.2, TCP port 5001\r", "TCP window size: 2.00 MByte (WARNING: requested 1.00 MByte)\r", "------------------------------------------------------------\r", "[  4] local 192.168.64.4 port 50814 connected with 192.168.64.2 port 5001\r", "[    2.616654] random: crng init done\r", "[ ID] Interval       Transfer     Bandwidth\r", "[  4]  0.0- 1.0 sec   391 MBytes  3.28 Gbits/sec\r", "[  4]  1.0- 2.0 sec   388 MBytes  3.25 Gbits/sec\r", "[  4]  2.0- 3.0 sec   389 MBytes  3.26 Gbits/sec\r", "[  4]  3.0- 4.0 sec   386 MBytes  3.24 Gbits/sec\r", "[  4]  4.0- 5.0 sec   380 MBytes  3.19 Gbits/sec\r", "[  4]  5.0- 6.0 sec   386 MBytes  3.24 Gbits/sec\r", "[  4]  6.0- 7.0 sec   392 MBytes  3.29 Gbits/sec\r", "[  4]  7.0- 8.0 sec   384 MBytes  3.22 Gbits/sec\r", "[  4]  8.0- 9.0 sec   384 MBytes  3.22 Gbits/sec\r", "[  4]  9.0-10.0 sec   391 MBytes  3.28 Gbits/sec\r", "[  4]  0.0-10.0 sec  3.78 GBytes  3.25 Gbits/sec\r", "+ sleep 2\r", "+ m5 exit\r", "Exiting @ tick 15588656572200 because m5_exit instruction encountered"], "stderr": ["warn: CheckedInt already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Enum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: ScopedEnum already exists in allParams. This may be caused by the Python 2.7 compatibility layer.", "warn: Physical memory size specified is 8192MB which is greater than 3GB.  Twice the number of memory controllers would be created.", "warn: No dot file generated. Please install pydot to generate the dot file and pdf.", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (4096 Mbytes)", "warn: DRAM device capacity (32768 Mbytes) does not match the address range assigned (8192 Mbytes)", "info: kernel located at: /home/hejingli/endhostsim-code/images/vmlinux", "warn: Sockets disabled, not accepting terminal connections", "warn: pollInterval=100000000  pciAsync=500000", "warn: Sockets disabled, not accepting gdb connections", "warn: Reading current count from inactive timer.", "warn: TimingPioPort::getAddrRanges()", "warn: TimingPioPort::getAddrRanges()", "info: Entering event queue @ 2219459665800.  Starting simulation...", "warn: PowerState: Already in the requested power state, request ignored", "info: Entering event queue @ 2219459675800.  Starting simulation...", "warn: instruction 'fwait' unimplemented", "warn: instruction 'verw_Mw_or_Rv' unimplemented", "warn: Don't know what interrupt to clear for console.", "warn: MOVNTDQ: Ignoring non-temporal hint, modeling as cacheable!", "warn: Tried to clear PCI interrupt 14"]}}, "success": true}