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OpenDAS
vllm_cscc
Commits
afd18c9c
Commit
afd18c9c
authored
Nov 27, 2025
by
zhuwenwen
Browse files
update VLLM_USE_FUSE_SILU_AND_MUL init value
parent
df845734
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vllm/envs.py
vllm/envs.py
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vllm/envs.py
View file @
afd18c9c
...
@@ -186,7 +186,7 @@ if TYPE_CHECKING:
...
@@ -186,7 +186,7 @@ if TYPE_CHECKING:
VLLM_USE_CUDA_GRAPH_SIZES
:
bool
=
False
VLLM_USE_CUDA_GRAPH_SIZES
:
bool
=
False
VLLM_USE_CAT_MLA
:
bool
=
False
VLLM_USE_CAT_MLA
:
bool
=
False
VLLM_REJECT_SAMPLE_OPT
:
bool
=
False
VLLM_REJECT_SAMPLE_OPT
:
bool
=
False
VLLM_USE_FUSE_SILU_AND_MUL
:
bool
=
Tru
e
VLLM_USE_FUSE_SILU_AND_MUL
:
bool
=
Fals
e
def
get_default_cache_root
():
def
get_default_cache_root
():
return
os
.
getenv
(
return
os
.
getenv
(
...
...
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