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OpenDAS
vllm_cscc
Commits
969da7d7
Unverified
Commit
969da7d7
authored
Dec 13, 2024
by
Roger Wang
Committed by
GitHub
Dec 13, 2024
Browse files
[V1][VLM] Fix edge case bug for InternVL2 (#11165)
Signed-off-by:
Roger Wang
<
ywang@roblox.com
>
parent
eeec9e33
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-1
vllm/model_executor/models/internvl.py
vllm/model_executor/models/internvl.py
+4
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vllm/model_executor/models/internvl.py
View file @
969da7d7
...
@@ -669,8 +669,11 @@ class InternVLChatModel(nn.Module, SupportsMultiModal, SupportsPP):
...
@@ -669,8 +669,11 @@ class InternVLChatModel(nn.Module, SupportsMultiModal, SupportsPP):
image_embeds
=
self
.
extract_feature
(
image_input
[
"data"
])
image_embeds
=
self
.
extract_feature
(
image_input
[
"data"
])
patches_per_image
=
image_input
[
"patches_per_image"
]
patches_per_image
=
image_input
[
"patches_per_image"
]
# Only one image in the current batch
if
len
(
patches_per_image
)
==
1
:
if
len
(
patches_per_image
)
==
1
:
image_embeds
=
image_embeds
.
unsqueeze
(
0
)
image_embeds
=
image_embeds
.
view
(
-
1
,
self
.
config
.
text_config
.
hidden_size
).
unsqueeze
(
0
)
return
image_embeds
return
image_embeds
# NOTE: Image embeddings are split into separate tensors for each image
# NOTE: Image embeddings are split into separate tensors for each image
...
...
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